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								|  | Wednesday, December 19, 2007 | 
							
								|  |  | 
							
								|  | 7:30 am - 8:30 am 
									- Breakfast | 
							
								|  |  | 
							
								|  | 8:00 am - 8:15 am | 
							
								|  | Inauguration Opening Remarks
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								|  |  | 
							
								|  | 8:15 am - 8:30 am | 
							
								|  | Introduction by Ashwini Kumar Nanda | 
							
								|  | Title: "CRL's Eka Supercomputer and its 
									mission" | 
							
								|  |  | 
							
								|  | 8:30 am - 9:30 am 
									- Keynote Address | 
							
								|  | The future is parallel but it may not be 
									easy | 
							
								|  | Speaker: Michael J. Flynn Maxeler Corporation and Stanford University, 
									USA
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								|  |  | 
							
								|  | 9:30 am - 10:00 am 
									- Break | 
							
								|  |  | 
							
								|  | 10:00 am - 12:30 pm - 
									Session 1 | 
							
								|  | Applications on I/O and FPGAs | 
							
								|  | Chair: | 
							
								|  | ROW-FS: A User-level Virtualized 
									Redirect-on-write Distributed File System 
									for Wide Area Applications | 
							
								|  | Vineet Chadha (University of Florida, US); Renato Figueiredo (University of Florida, 
									US);
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								|  |  | 
							
								|  | No More Energy-Performance Trade-Off: A New 
									Data Placement Strategy for RAID-Structured 
									Storage Systems | 
							
								|  | Tao Xie (San Diego State University, US); Yao Sun (San Diego State University, US);
 | 
							
								|  |  | 
							
								|  | On Reducing the IO Volume in a Sparse 
									Out-of-core Solver | 
							
								|  | Emmanuel Agullo (ENS Lyon, FR); Abdou Guermouche (Labri/Univ. Bordeaux, FR);
 Jean-Yves L'Excellent (INRIA/ENS-Lyon, FR);
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								|  | Experiments With A Parallel External Memory 
									System | 
							
								|  | Mohammad Nikseresht (Carleton University, 
									CA); Anil Maheshwari (Carleton University, CA);
 David Hutchinson (Carleton University, CA);
 | 
							
								|  |  | 
							
								|  | An FPGA-based Accelerator for Multiple 
									Biological Sequence Alignment with DIALIGN | 
							
								|  | Azzedine Boukerche (University of Ottawa, 
									CA); Alba Cristina Melo (University of Brasilia (UnB), 
									BR);
 Jan Correa (University of Brasilia (UnB), 
									BR);
 Ricardo Jacobi (Univesity of Brasilia, BR);
 Adson Rocha (University of Brasilia (UnB), 
									BR);
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								|  | A speed-area optimized architecture for Full 
									Search Block Matching with applications in 
									high-definition TVs (HDTV) | 
							
								|  | Santosh Ghosh (Indian Institute of 
									Technology, IN); | 
							
								|  |  | 
							
								|  | 10:00 am - 12:30 pm 
									- Session 2 | 
							
								|  | Microarchitecture and Multiprocessor 
									Architecture | 
							
								|  | Chair: | 
							
								|  |  | 
							
								|  | Evaluating ISA support and Hardware Support 
									for Recursive Data Layouts | 
							
								|  | Won-Taek Lim (Purdue University, US); Mithuna Thottethodi (Purdue University, US);
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								|  |  | 
							
								|  | qTLB: Looking inside the Look-aside buffer | 
							
								|  | Omesh Tickoo (Intel Corporation, US); Hari Kannan (Stanford, US);
 Vineet Chadha (University of Florida, US);
 Ramesh Illikkal (Intel Corporation, US);
 Ravishankar Iyer (Intel Corp, US);
 Don Newell (Intel Corporation, US);
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								|  |  | 
							
								|  | Analysis of x86 ISA condition codes 
									influence on superscalar execution | 
							
								|  | Virginia Escuder (Universidad de Alcalá, 
									ES); Raúl Durán (Universidad de Alcalá, ES);
 Rafael Rico (Universidad de Alcalá, ES);
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								|  |  | 
							
								|  | Efficient Message Management in Tiled CMP 
									Architectures using a Heterogeneous 
									Interconnection Network | 
							
								|  | Antonio Flores Gil (University of Murcia, 
									Spain, ES); Manuel Acacio (Universidad de Murcia, Spain, 
									ES);
 Juan Aragón (Universidad de Murcia, Spain, 
									ES)
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								|  |  | 
							
								|  | Direct Coherence: Bringing Together 
									Performance and Scalability in Shared-Memory 
									Multiprocessors | 
							
								|  | Alberto Ros (Universidad de Murcia, Spain, 
									ES); Manuel Acacio (Universidad de Murcia, Spain, 
									ES);
 José M. García (Universidad de Murcia, 
									Spain, ES);
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								|  |  | 
							
								|  | Constraint-aware Large-scale CMP Cache 
									Design | 
							
								|  | Srihari Makineni (Intel Corp., US); Ravishankar Iyer (Intel Corp, US);
 Li Zhao (Intel, US);
 Jaideep Moses (Intel Corp., US);
 Ramesh Illikkal (Intel Corporation, US);
 Don Newell (Intel Corporation, US);
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								|  |  | 
							
								|  | 12:30 pm - 1:30 pm 
									- Lunch | 
							
								|  |  | 
							
								|  | 1:30 pm - 2:30 pm 
									- Keynote Address | 
							
								|  | Petaflop/s, Seriously | 
							
								|  | Speaker: David Keyes Fu Foundation Professor, Applied Physics and 
									Applied Mathematics, Columbia University, 
									USA
 Acting Director, Institute for Scientific 
									Computing Research, LLNL, USA
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								|  |  | 
							
								|  | 2:00 pm - 2:30 pm 
									- Break | 
							
								|  | Poster Setup Time | 
							
								|  |  | 
							
								|  | 3:00 pm - 4:30 pm 
									- Poster Presentations (2-3 min. per poster) | 
							
								|  | Chair:
									
									Rajeev Thakur, Argonne National 
									Laboratory Click
									
									here for full details.
 | 
							
								|  |  | 
							
								|  | 4:30 pm - 5:30 pm 
									- Poster Session | 
							
								|  | Chair:
									
									Rajeev Thakur, Argonne National 
									Laboratory | 
							
								|  |  | 
							
								|  | 5:30 pm - 6:00 pm | 
							
								|  | Best Paper and Best Poster Awards Plenary 
									Session | 
							
								|  | Chair: | 
							
								|  |  | 
							
								|  | Distributed Ranked Search | 
							
								|  | Vijay Gopalakrishnan (AT T Labs - Research, 
									US); Ruggero Morselli (Google, US);
 Samrat Bhattacharjee (University of Maryland 
									at College Park, US);
 Pete Keleher (University of Maryland, US);
 Aravind Srinivasan (University of Maryland, 
									US);
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								|  |  | 
							
								|  | 6:00 pm - 7:00 pm 
									- Invited Plenary Talk | 
							
								|  | Title: "The Architecture, Design, and Layout 
									of the Eka Supercomputer" | 
							
								|  | Speaker: Ashwini Kumar Nanda | 
							
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